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  features ? ballast control and half-bridge driver in one ic ? programmable preheat frequency ? programmable preheat time ? internal ignition ramp ? programmable over-current threshold ? programmable run frequency data sheet no. pd60182-i ballast control ic cfl application diagram ? programmable dead time ? dc bus under-voltage reset ? shutdown pin with hysteresis ? internal 15.6v zener clamp diode on vcc ? micropower startup (150 a) ? latch immunity and esd protection description the IR2156 incorporates a high voltage half-bridge gate driver with a programmable oscillator and state diagram to form a complete ballast control ic. the IR2156 features include programmable preheat and run frequencies, programmable preheat time, program- mable dead-time, and programmable over-current pro- tection. comprehensive protection features such as protection from failure of a lamp to strike,filament fail- ures, as well as an automatic restart function, have been included in the design. the IR2156 is available in both 14 lead pdip and 14 lead soic packages. www.irf.com 1 packages 14 lead pdip 14 lead soic (narrow body) l res c vcc1 m2 m1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 IR2156 rt rph vdc cph cs lo vs ho vb com c boot ct sd c res l n nc f1 l filte r c filte r r ph r t c cph c t r 1 c snub c cp d cp1 d cp2 c elcap1 c elcap1 d rect1 d rect2 vcc c vcc2 c vdc d boot r bus r supply r cs c cs IR2156 ( s )
IR2156 ( s ) 2 www.irf.com absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. note 1: this ic contains a zener clamp structure between the chip v cc and com which has a nominal breakdown voltage of 15.6v. please note that this supply pin should not be driven by a dc, low impedance power source greater than the v clamp specified in the electrical characteristics section. symbol definition min. max. units v b high side floating supply voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v lo low side output voltage -0.3 v cc + 0.3 i omax maximum allowable output current (ho, lo) -500 500 due to external power transistor miller effect v vdc vdc pin voltage -0.3 v cc + 0.3 v ct ct pin voltage -0.3 v cc + 0.3 v cc + 0.3 i cph cph pin current -5 5 i rph rph pin current -5 5 v rph rph pin voltage -0.3 v cc + 0.3 v i rt rt pin current -5 5 ma v rt rt pin voltage -0.3 v cc + 0.3 v cs current sense pin voltage -0.3 5.5 i cs current sense pin current -5 5 i sd shutdown pin current -5 5 i cc supply current (note 1) -20 20 dv/dt allowable offset voltage slew rate -50 50 v/ns p d package power dissipation @ t a +25 c (14 pin pdip) ? 1.70 p d = (t jmax -t a )/rth ja (14 pin soic) ? 1.00 rth ja thermal resistance, junction to ambient (14 pin pdip) ? 70 (14 pin soic) ? 120 t j junction temperature -55 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) ? 300 v ma ma v ma v w o c/w o c
IR2156 ( s ) www.irf.com 3 recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v b s high side floating supply voltage v cc - 0.7 v clamp v bsmin minimum required vbs voltage for proper ho functionality 5 v cc v s steady state high side floating supply offset voltage -1 600 v cc supply voltage v ccuv+ v clamp i cc supply current note 2 10 ma c t ct lead capacitance 220 ? pf i sd shutdown lead current -1 1 i cs current sense lead current -1 1 t j junction temperature -40 125 o c i sdlk sd pin leakage current (@v sd =6v) ? 125 i cslk cs pin leakage current (@v cs =3v) ? 25 v ma note 2: enough current should be supplied into the v cc lead to keep the internal 15.6v zener clamp diode on this lead regulating its voltage, v clamp . electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, v vdc = open, r t = 39.0k ? , r ph = 100.0k ? , c t = 470 pf, v cph = 0.0v, v cs = 0.0v, v sd = 0.0v, c lo, ho = 1000pf, t a = 25 o c unless otherwise specified. symbol definition min. typ. max. units test conditions supply characteristics v ccuv+ v cc supply undervoltage positive going 10.5 11.5 12.5 v cc rising from 0v threshold v ccuv- v cc supply undervoltage negative going 8.5 9.5 10.5 v cc falling from 14v threshold v uvhys v cc supply undervoltage lockout hysteresis 1.5 2.0 3.0 i qccuv uvlo mode quiescent current 50 120 200 v cc = 11v i qccflt fault-mode quiescent current ? 200 470 sd = 5.1v, or cs > 1.3v i qcc quiescent v cc supply current ? 1.0 1.5 ct connected to com vcc =14v,rt=15k ? i qcc50k v cc supply current, f = 50khz ? 1.0 1.5 rt = 15k ? c t = 470 pf v clamp v cc zener clamp voltage 14.5 15.6 16.5 v i cc = 5ma a v ma i qbs0 quiescent v bs supply current -5 0 5 v ho = v s (c t = 0v) i qbs1 quiescent v bs supply current ? 30 50 v ho = v b (c t = 14v) i lk offset supply leakage current ? ? 50 a v b = v s = 600v a floating supply characteristics a
IR2156 ( s ) 4 www.irf.com electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, v vdc = open, r t = 39.0k ? , r ph = 100.0k ? , c t = 470 pf, v cph = 0.0v, v cs = 0.0v, v sd = 0.0v, c lo, ho = 1000pf, t a = 25 o c unless otherwise specified. symbol definition min. typ. max. units test conditions rph characteristics i rphlk open circuit rph pin leakage current ? 0.1 ? a ct = 10v v rphflt fault-mode rph pin voltage ? 0 ? mv sd > 5.1v or cs > 1.3v oscillator, ballast control, i/o characteristics khz f osc oscillator frequency 28 30 32 r t =33.0k ? , v v dc = 5v v cph = open (guaranteed by design) f osc oscillator frequency 37.6 40 43.9 khz r t =40k, r ph = 100k c t = 470pf d oscillator duty cycle ? 50 ? % v ct+ upper c t ramp voltage threshold ? 8.3 ? v ct- lower c t ramp voltage threshold ? 4.8 ? v ctflt fault-mode c t pin voltage ? 0 ? mv sd > 5.1v or cs > 1.3v only ct cap should beconnected to ct t dlo lo output deadtime ? 2.0 ? usec t dho ho output deadtime ? 2.0 ? usec r dt internal deadtime resistor ? 3 ? k ? v v cc = 14v rt characteristics i rtlk open circuit rt pin leakage current ? 0.1 ? a ct = 10v v rtflt fault-mode rt pin voltage ? 0 ? mv sd > 5.1v or cs > 1.3v preheat characteristics i cph cph pin charging current 3.6 4.3 5.2 a v cph =10v,ct=10v, vdc=5v v cphflt fault-mode cph pin voltage ? 0 ? mv sd > 5.1v or cs > 1.3v v sdth+ rising shutdown pin threshold voltage ? 5.1 ? v v sdhys shutdown pin threshold hysteresis ? 450 ? mv v csth over-current sense threshold voltage 1.1 1.25 1.44 v t cs over-current sense propogation delay ? 160 ? nsec delay from cs to lo v cspw over-current sense minimum pulse width ? 135 ? nsec v cs pulse amplitude = v csth +100mv r vdc dc bus sensing resistor 7.5 10 14 k ? v cph >12v, vct=0v vdc= 7v v cph-vdc cph to vdc offset voltage 10.3 10.9 11.4 v v cph =open,v vdc= 0v protection characteristics v ol low-level output voltage ? 0 105 io = 0 v oh high-level output voltage ? 0 100 v bias - vo, io = 0 tr turn-on rise time ? 110 150 tf turn-off fall time ? 55 100 gate driver output characteristics mv ns c lo = c ho =1nf
IR2156 ( s ) www.irf.com 5 lead assignments & definitions block diagram pin assignments 1 2 3 4 5 6 7 10 9 8 IR2156 nc vcc vdc rt rph com ct cs lo vs ho vb cph sd 14 13 12 11 pin # symbol description 1 14 13 3 12 7 6 5 4 2 rt vs ho nc sd cph ct rph minimum frequency timing resistor preheat frequency timing resistor oscillator timing capacitor preheat timing capacitor high-side gate driver output high-side floating return cs current sensing input 9 11 10 8 lo vb vcc com ic power & signal ground logic & low-side gate driver supply high-side gate driver floating supply low-side gate driver output shutdown input no connect vdc ic start-up and dc bus sensing input rt cph vb ho vs lo cs vcc ct rph com r v th r icph r under- voltage detect fault logic driver logic high- side driver low- side driver comp 1 schmitt 1 sd 5.1v soft start 1.3v r r 2.5k 40k s1 s2 s3 s4 q t rq s6 comp 2 comp 3 q s r2 q r1 vdc 10k 5.1v 5.1v rdt rvdc
IR2156 ( s ) 6 www.irf.com state diagram vcc < 9.5v (vcc fault or power down) or sd > 5.1v (lamp fault or lamp removal ) uvlo mode 1 / 2 -bridge off i qcc ? 120 a cph = 0v ct = 0v (oscillator off) preheat mode 1 / 2 -bridge oscillating @ f ph rph // rt cph charging @ i cph = 5 a cs enabled @ cph > 7.5v r vdc to com = 12.6k ? @ cph > 7.5v vcc > 11.5v (uv+) and sd < 5.1v power turned on fault mode fault latch set 1 / 2 -bridge off i qcc ? 180 a cph = 0v vcc = 15.6v ct = 0v (oscillator off) cs > 1.3v (failure to strike lamp) cs > 1.3v (lamp removal) or sd > 5.1v or vcc < 9.5v (uv-) (power turned off) cph > 10v (end of preheat mode) run mode rph = open 1/2-bridge oscillating @ f run ignition ramp mode rph ! open f ph ramps to f run cph charging cph > 13v cs > 1.3v (lamp fault)
IR2156 ( s ) www.irf.com 7 timing diagrams normal operation vcc ho lo uvlo+ 15.6v uvlo- cph cs ph ign run uvlo uvlo 1.3v over-current threshold freq 7.5v vcc f ph f run rt ct lo cs ho rph rt ct lo cs ho rph rt ct lo cs ho rph vdc
IR2156 ( s ) 8 www.irf.com timing diagrams fault condition vcc ho lo uvlo+ 15.6v uvlo- cph cs ph ign run uvlo uvlo 1.3v freq 7.5v vcc f ph f run fault ph ign sd > 5.1v sd rt ct lo cs ho rph rt ct lo cs ho rph rt ct lo cs ho rph vdc csth
IR2156 ( s ) www.irf.com 9 0 200 400 600 800 1000 1200 1400 1600 0 0.5 1 1.5 2 2.5 3 dt ( s) ct (pf) graph 1. ct vs dead time (IR2156) 0 1 2 3 4 5 6 40 80 120 160 200 frequency (khz) i cc (ma) graph 2. i cc vs frequency (IR2156) 40 50 60 70 80 90 100 110 120 9 10111213 v cph (v) frequency (khz) rph=15k rph=30k 30 40 50 60 70 80 90 0123 vdc (v) frequency (khz) rph=15k rph=30k rph=100k graph 3. frequency vs v cph (IR2156) graph 4. frequency vs vdc (IR2156)
IR2156 ( s ) 10 www.irf.com 0 1 2 3 4 5 6 0 5 10 15 v cph (v) i cph ( a) 0 0.5 1 1.5 2 8 9 10 11 12 13 v cc (v) i qcc (ma) graph 6. frequency vs rt (IR2156) graph 5. i cph vs v cph (IR2156) graph 7. i qcc vs v cc (IR2156) uvlo hysteresis graph 8. i qbs vs v cc vs temp(IR2156) -10 0 10 20 30 40 50 60 70 03691215 v bs (v) i qbs ( a) 125 c 75 c 25 c -25 c o o o o 1000 10000 100000 1000000 4 13223140 rt (k ? ) frequency (hz) ct=220pf ct=470pf ct=1000pf ct=2200pf ct=3300pf ct=4800pf ct=6800pf
IR2156 ( s ) www.irf.com 11 1 1.1 1.2 1.3 1.4 1.5 -25 0 25 50 75 100 125 temperature c cs+ (v) 2 2.5 3 3.5 4 4.5 5 -25 0 25 50 75 100 125 temperature c r dt (k ) graph 9. v csth + vs temperature (IR2156) graph 10. r dt vs temperature (IR2156) graph 11. r vdc + vs temperature (IR2156) graph 12. uv+, uv- vs temperature (IR2156) 10 11 12 13 14 15 -25 0 25 50 75 100 125 temperature c r vdc (k ) 8 9 10 11 12 13 14 -25 0 25 50 75 100 125 temperature c uv+, uv- (v ) uv + uv -
IR2156 ( s ) 12 www.irf.com graph 14. i lk vs temperature (IR2156) graph 13. sd+, sd- vs temperature (IR2156) 4 4.25 4.5 4.75 5 5.25 5.5 5.75 6 -25 0 25 50 75 100 125 sd+, sd- (v) temperature c sd+ sd- 0 4 8 12 16 20 0 5 10 15 20 v cc (v) i qcc (ma) -25 25 75 125 0 4 8 12 16 20 15 15.5 16 16.5 v cc (v) i qcc (ma) -25 25 75 125 0 5 10 15 20 25 30 35 -25 0 25 50 75 100 125 temperature c i lk ( a) graph 15. i qcc vs v cc vs temperature (IR2156) graph 16. i qcc vs v cc vs temperature (IR2156) internal zener diode curve
IR2156 ( s ) www.irf.com 13 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 10 10.5 11 11.5 12 12.5 13 v cc (v) i qcc (ma) -25 25 75 125 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 8.5 9 9.5 10 10.5 v cc (v) i qcc ( a) -25 25 75 125 40 45 50 55 60 65 70 -25 0 25 50 75 100 125 temp(c) frequency (khz) graph 17. i qcc vs v cc vs temperature (IR2156) v ccuv + graph 18. i qcc vs v cc vs temperature (IR2156) v ccuv - graph 19. f osc vs v cc vs temperature (IR2156) v cph = 0v graph 20. f osc vs temperature (IR2156) v cph = 0v 54 54.5 55 55.5 56 56.5 57 57.5 58 58.5 11 12 13 14 v cc (v) frequency (khz) -25 c 75 c 125 c 25 c o o o o
IR2156 ( s ) 14 www.irf.com 0 0.5 1 1.5 2 2.5 3 3.5 11 12 13 14 15 v cc (v) i cph ( a) -25 25 75 125 graph 21. i cph vs v cc vs temperature (IR2156) v cph = v cc graph 22. i cph vs v cc vs temperature (IR2156) v cph = 0v graph 23. t dead vs v cc vs temperature (IR2156) ct = 1nf graph 24. t rise(ho) vs v cc vs temperature (IR2156) 0 20 40 60 80 100 120 140 160 180 200 11 12 13 14 15 v cc (v) t rise(ho) (nsec) 125 c 75 c 25 c -25 c o o o o 1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 2.25 11 12 13 14 15 v cc (v) t dead (lo) ( sec) 125 c 75 c 25 c -25 c o o o o 4 4.5 5 5.5 6 11 12 13 14 15 v cc (v) i cph ( a) 125 c 75 c 25 c -25 c o o o o
IR2156 ( s ) www.irf.com 15 graph 25. t fall(ho) vs v cc vs temperature (IR2156) graph 26. t rise(lo) vs v cc vs temperature (IR2156) graph 27. t fall(lo) vs v cc vs temperature (IR2156) 0 20 40 60 80 100 120 11 12 13 14 15 v cc (v) t fall(lo) (nsec) 125 c 75 c 25 c -25 c o o o o 0 20 40 60 80 100 120 11 12 13 14 15 v cc (v) t fall(ho) (nsec) 125 c 25 c 75 c -25 c o o o o 0 50 100 150 200 250 11 12 13 14 15 v cc (v) t rise(lo) (nsec) 125 c 75 c 25 c -25 c o o o o
IR2156 ( s ) 16 www.irf.com functional description under-voltage lock-out mode (uvlo) the under-voltage lock-out mode (uvlo) is defined as the state the ic is in when vcc is below the turn-on threshold of the ic. to identify the different modes of the ic, refer to the state diagram shown on page 6 of this document. the IR2156 undervoltage lock-out is designed to maintain an ultra low supply current of less than 200ua, and to guarantee the ic is fully functional before the high and low side output drivers are activated. figure 1 shows an efficient supply voltage using the start-up current of the IR2156 together with a charge pump from the ballast output stage (rsupply, cvcc, dcp1 and dcp2). 14 13 12 11 8 IR2156 lo com vb vs ho half-bridge output r supply d cp1 d cp2 m2 m1 c snub v bus (+) d boot c boot r cs v bus (-) 2 vcc c vcc figure 1, start-up and supply circuitry. the start-up capacitor (cvcc) is charged by current through supply resistor (rsupply) minus the start-up current drawn by the ic. this resistor is chosen to provide 2x the maximum start-up current to guarantee ballast start-up at low line input voltage. once the capacitor voltage on vcc reaches the start-up threshold, and the sd pin is below 4.5 volts, the ic turns on and ho and lo begin to oscillate. the capacitor begins to discharge due to the increase in ic operating current (figure 2). discharge time internal vcc zener clamp voltage vhyst v uvlo+ v uvlo- charge pump output t v c1 r supply & c vcc time constant c vcc discharge figure 2, supply capacitor (cvcc) voltage. during the discharge cycle, the rectified current from the charge pump charges the capacitor above the ic turn-off threshold. the charge pump and the internal 15.6v zener clamp of the ic take over as the supply voltage. the start-up capacitor and snubber capacitor must be selected such that enough supply current is available over all ballast operating conditions. a bootstrap diode (dboot) and supply capacitor (cboot) comprise the supply voltage for the high side driver circuitry. to guarantee that the high-side supply is charged up before the first pulse on pin ho, the first pulse from the output drivers comes from the lo pin. during undervoltage lock-out mode, the high- and low-side driver outputs ho and lo are both low, pin ct is connected internally to com to disable the oscillator, and pin cph is connected internally to com for resetting the preheat time. preheat mode (ph) the preheat mode is defined as the state the ic is in when the lamp filaments are being heated to their correct emission temperature. this is necessary for maximizing lamp life and reducing the required ignition voltage. the IR2156 enters preheat mode when vcc exceeds the uvlo positive-going threshold. ho and lo begin to
IR2156 ( s ) www.irf.com 17 5 4 4ua 6 7 cph ct rph rt 11 8 com lo m2 r cs osc. 13 ho m1 12 vs r t r ph c cph half bridge output i load v bus (+) v bus (-) load return half- bridge driver IR2156 1.3v s1 s4 comp 4 10 2 vcc cs r1 c cs s3 fault logic c t oscillate at the preheat frequency with 50% duty cycle and with a dead-time which is set by the value of the external timing capacitor, ct, and internal deadtime resistor, rdt. pin cph is disconnected from com and an internal 4 a current source (figure 3) figure 3, preheat circuitry. charges the external preheat timing capacitor on cph linearly. the over-current protection on pin cs is disabled during preheat. the preheat frequency is determined by the parallel combination of resistors rt and rph, together with timing capacitor ct. ct charges and discharges between 1/3 and 3/5 of vcc (see timing diagram, page 7). ct is charged exponentially through the parallel combination of rt and rph connected internally to vcc through mosfet s1. the charge time of ct from 1/3 to 3/5 vcc is the on-time of the respective output gate driver, ho or lo. once ct exceeds 3/5 vcc, mosfet s1 is turned off, disconnecting rt and rph from vcc. ct is then discharged exponentially through an internal resistor, rdt, through mosfet s3 to com. the discharge time of ct from 3/5 to 1/3 vcc is the dead-time (both off) of the output gate drivers, ho and lo. the selected value of ct together with rdt therefore program the desired dead-time (see design equations, page 19, equations 1 and 2). once ct discharges below 1/3 vcc, mosfet s3 is turned off, disconnecting rdt from com, and mosfet s1 is turned on, connecting rt and rph again to vcc. the frequency remains at the preheat frequency until the voltage on pin cph exceeds 13v and the ic enters ignition mode. during the preheat mode, both the over-current protection and the dc bus under-voltage reset are enabled when pin cph exceeds 7.5v. ignition mode (ign) the ignition mode is defined as the state the ic is in when a high voltage is being established across the lamp necessary for igniting the lamp. the IR2156 enters ignition mode when the voltage on pin cph exceeds 13v. figure 4, ignition circuitry. pin cph is connected internally to the gate of a p-channel mosfet (s4) (see figure 4) that connects pin rph with pin rt. as pin cph 5 4 4ua 6 7 cph ct rph rt 11 8 com lo m2 rcs osc. 13 ho m1 12 vs r t r ph c cph half bridge output i load v bus (+) v bus (-) load return half- bridge driver IR2156 s4 c t
IR2156 ( s ) 18 www.irf.com exceeds 13v, the gate-to-source voltage of mosfet s4 begins to fall below the turn-on threshold of s4. as pin cph continues to ramp towards vcc, switch s4 turns off slowly. this results in resistor rph being disconnected smoothly from resistor rt, which causes the operating frequency to ramp smoothly from the preheat frequency, through the ignition frequency, to the final run frequency. the over-current threshold on pin cs will protect the ballast against a non-strike or open-filament lamp fault condition. the voltage on pin cs is defined by the lower half-bridge mosfet current flowing through the external current sensing resistor rcs. the resistor rcs therefore programs the maximum allowable peak ignition current (and therefore peak ignition voltage) of the ballast output stage. the peak ignition current must not exceed the maximum allowable current ratings of the output stage mosfets. should this voltage exceed the internal threshold of 1.3v, the ic will enter fault mode and both gate driver outputs ho and lo will be latched low. run mode (run) once the lamp has successfully ignited, the ballast enters run mode. the run mode is defined as the state the ic is in when the lamp arc is established and the lamp is being driven to a given power level. the run mode oscillating frequency is determined by the timing resistor rt and timing capacitor ct (see design equations, page 19, equations 3 and 4). should hard-switching occur at the half-bridge at any time due to an open- filament or lamp removal, the voltage across the current sensing resistor, rcs, will exceed the internal threshold of 1.3 volts and the ic will enter fault mode. both gate driver outputs, ho and lo, will be latched low. dc bus under-voltage reset should the dc bus decrease too low during a brown-out line condition or over-load condition, the resonant output stage to the lamp can shift near or below resonance. this can produce hard- switching at the half-bridge which can damage the half-bridge switches. to protect against this, pin vdc measures the dc bus voltage and pulls down on pin cph linearly as the voltage on pin vdc decreases 10.9v below vcc. this causes the p-channel mosfet s4 (figure 4) to close as the dc bus decreases and the frequency to shift higher to a safe operating point above resonance. the dc bus level at which the frequency shifting occurs is set by the external rbus resistor and internal rvdc resistor. by pulling down on pin cph, the ignition ramp is also reset. therefore, should the lamp extinguish due to very low dc bus levels, the lamp will be automatically ignited as the dc bus increases again. the internal rvdc resistor is connected between pin vdc and com when cph exceeds 7.5v (during preheat mode). fault mode (fault) should the voltage at the current sensing pin, cs, exceed 1.3 volts at any time after the preheat mode, the ic enters fault mode and both gate driver outputs, ho and lo, are latched in the 'low' state. cph is discharged to com for resetting the preheat time, and ct is discharged to com for disabling the oscillator. to exit fault mode, vcc must be recycled back below the uvlo negative- going turn-off threshold, or, the shutdown pin, sd, must be pulled above 5.1 volts. either of these will force the ic to enter uvlo mode (see state diagram, page 6). once vcc is above the turn- on threshold and sd is below 4.5 volts, the ic will begin oscillating again in the preheat mode.
IR2156 ( s ) www.irf.com 19 design equations note: the results from the following design equations can differ slightly from experimental measurements due to ic tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time. step 1: program dead-time the dead-time between the gate driver outputs ho and lo is programmed with timing capacitor ct and an internal dead-time resistor rdt. the dead-time is the discharge time of capacitor ct from 3/5vcc to 1/3vcc and is given as: 2000 ? = t dt c t [seconds] (1) or 2000 dt t t c = [farads] (2) step 2: program run frequency the final run frequency is programmed with timing resistor rt and timing capacitor ct. the charge time of capacitor ct from 1/3vcc to 3/5vcc determines the on-time of ho and lo gate driver outputs. the run frequency is therefore given as: ) 2000 6 . 0 ( 2 1 + ? ? = t t run r c f [hertz] (3) or 3333 12 . 1 1 ? ? ? = run t t f c r [ohms] (4) step 3: program preheat frequency the preheat frequency is programmed with timing resistors rt and rph, and timing capacitor ct. the timing resistors are connected in parallel internally for the duration of the preheat time. the preheat frequency is therefore given as: ? ? ? ? ? ? ? ? + + ? ? ? ? = 2000 6 . 0 2 1 ph t ph t t ph r r r r c f [hertz] (5) or ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = 3333 12 . 1 1 3333 12 . 1 1 ph t t t ph t ph f c r r f c r [ohms] (6) step 4: program preheat time the preheat time is defined by the time it takes for the capacitor on pin cph to charge up to 13 volts (assuming vcc = 15 volts). an internal current source of 4.3 a flows out of pin cph. the preheat time is therefore given as: [seconds] (7) or [farads] (8) step 5: program maximum ignition current the maximum ignition current is programmed with the external resistor rcs and an internal threshold of 1.25 volts. this threshold determines the over- current limit of the ballast, which can be exceeded when the frequency ramps down towards resonance during ignition and the lamp does not 6 02 . 3 e c t ph ph ? = 6 331 . 0 ? ? = e t c ph ph
IR2156 ( s ) 20 www.irf.com ignite. the maximum ignition current is given as: cs ign r i 25 . 1 = [amps peak] (9) or ign cs i r 25 . 1 = [ohms] (10) design example: 42w-quad biax cfl note: the results from the following design example can differ slightly from experimental results due to ic tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time. step 1: program dead-time the dead-time is chosen to be 0.8 s. using equation (2) gives the following result: pf pf e t c dt t 470 400 2000 6 8 . 0 2000 ? = ? = = step 2: program run frequency the run frequency is chosen to be 43khz. using equation (4) gives the following result: 3333 12 . 1 1 ? ? ? = run t t f c r 3333 43000 470 12 . 1 1 ? ? ? = pf r t ? ? ? = k r t 43 846 , 40 step 3: program preheat frequency the preheat frequency is chosen such that the lamp filaments are adequately heated within the preheat time. a preheat frequency of 70khz was chosen. using equation (6) gives the following result: ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = 3333 12 . 1 1 3333 12 . 1 1 ph t t t ph t ph f c r r f c r ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = 3333 70000 470 02 . 1 1 43000 43000 3333 70000 470 12 . 1 1 pf pf r ph ? ? ? = k r ph 51 330 , 53 step 4: program preheat time the preheat time of 500ms seconds was chosen. using equation (8) gives the following result: step 5: program ignition current the maximum ignition current is given by the maximum ignition voltage and is chosen as 2.0apk. using equation (10) gives the following result: 6 331 . 0 ? ? = e t c ph ph ) 6 331 . 0 ( ) 3 500 ( ? ? ? = e e c ph uf uf c ph 22 . 0 166 . 0 > ? =
IR2156 ( s ) www.irf.com 21 ign cs i r 25 . 1 = ohms ohms r cs 61 . 0 625 . 0 0 . 2 3 . 1 ? = = results a fully-functional ballast was designed, built and tested using the calculated values. the values were then adjusted slightly in order to fulfill various ballast parameters (table 1). the ballast was designed using the 'typical application schematic' given on page 1. parameter description value fph preheat frequency 68khz vph lamp preheat voltage 460vpp tph preheat time 700ms rw:rc filament preheat ratio 4:1 vign maximum ignition voltage 1500vpp tign ignition ramp time 50ms frun running frequency 47.5khz vrun running lamp voltage 180vpk pin running ballast input power 42w table 1, 42w-quad biax ballast measured results waveforms waveform 1. lamp filament voltage during preheat waveform 2. lamp voltage during preheat, ignition and run modes waveform 3, half-bridge and current sense voltage during run mode waveform 4, lamp voltage and current sense pin during a failure-to-strike lamp fault condition.
IR2156 ( s ) 22 www.irf.com 01-6010 01-3002 03 (ms-001ac) 14-lead pdip case outline 01-6019 01-3063 00 (ms-012ab) 14-lead soic (narrow body)
IR2156 ( s ) www.irf.com 23 bill of materials schematic: typical application diagram, page 1 lamp type: 42w-quad biax line input voltage: 120vac item qty description designator value manufacturer part no. 1 1 fuse f1 2 1 filter capacitor cfilter 0.1 f/400v 3 1 filter inductor lfilter 330 h/0.5a 4 2 rectifier diode drect1, drect2 1n4007 5 2 electrolytic capacitor celcap1, celcap2 47 f/250v 6 1 resonant inductor lres 1.25mh/1.5a 7 1 charge pump capacitor ccp 470pf/1kv 8 2 charge pump diodes dcp1, dcp2 1n4148 9 1 resonant capacitor cres 6.8nf/1kv 10 1 snubber capacitor csnub 470pf/1kv 11 2 half-bridge mosfet m1, m2 irf730 12 1 current sense resistor rcs 0.75r/0.5w 13 1 limit resistor r1 1k/0.25w 14 1 filter capacitor ccs 470pf/16v 15 2 supply capacitor cboot, cvcc1 0.1 f/25v 16 1 supply capacitor cvcc2 2.2 f/25v 17 1 bootstrap diode dboot 10df6 18 1 ballast control ic ic1 IR2156 19 2 resistor rsupply, rbus 1m/0.25w 20 1 timing resistor rt 39k/0.25w 21 1 timing capacitor ct 470pf/25v 22 1 preheat resistor rph 75k/0.25w 23 1 preheat capacitor cph 0.22 f/25v 24 1 capacitor cvdc 0.01 f/25v total 30 ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 data and specifications subject to change without notice. 9/19/2003 device qualified to industrial level


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